|
| enum | {
ETM_CTRL = 0x00
, ETM_CONFIG = 0x01
, ETM_TRIG_EVENT = 0x02
, ETM_ASIC_CTRL = 0x03
,
ETM_STATUS = 0x04
, ETM_SYS_CONFIG = 0x05
, ETM_TRACE_RESOURCE_CTRL = 0x06
, ETM_TRACE_EN_CTRL2 = 0x07
,
ETM_TRACE_EN_EVENT = 0x08
, ETM_TRACE_EN_CTRL1 = 0x09
, ETM_FIFOFULL_REGION = 0x0a
, ETM_FIFOFULL_LEVEL = 0x0b
,
ETM_VIEWDATA_EVENT = 0x0c
, ETM_VIEWDATA_CTRL1 = 0x0d
, ETM_VIEWDATA_CTRL2 = 0x0e
, ETM_VIEWDATA_CTRL3 = 0x0f
,
ETM_ADDR_COMPARATOR_VALUE = 0x10
, ETM_ADDR_ACCESS_TYPE = 0x20
, ETM_DATA_COMPARATOR_VALUE = 0x30
, ETM_DATA_COMPARATOR_MASK = 0x40
,
ETM_COUNTER_RELOAD_VALUE = 0x50
, ETM_COUNTER_ENABLE = 0x54
, ETM_COUNTER_RELOAD_EVENT = 0x58
, ETM_COUNTER_VALUE = 0x5c
,
ETM_SEQUENCER_EVENT = 0x60
, ETM_SEQUENCER_STATE = 0x67
, ETM_EXTERNAL_OUTPUT = 0x68
, ETM_CONTEXTID_COMPARATOR_VALUE = 0x6c
,
ETM_CONTEXTID_COMPARATOR_MASK = 0x6f
, ETM_ID = 0x79
} |
| |
| enum | {
ETM_CTRL_POWERDOWN = (1 << 0)
, ETM_CTRL_MONITOR_CPRT = (1 << 1)
, ETM_CTRL_TRACE_DATA = (1 << 2)
, ETM_CTRL_TRACE_ADDR = (2 << 2)
,
ETM_CTRL_TRACE_MASK = (3 << 2)
, ETM_PORT_4BIT = 0x00
, ETM_PORT_8BIT = 0x10
, ETM_PORT_16BIT = 0x20
,
ETM_PORT_24BIT = 0x30
, ETM_PORT_32BIT = 0x40
, ETM_PORT_48BIT = 0x50
, ETM_PORT_64BIT = 0x60
,
ETM_PORT_1BIT = 0x00 | (1 << 21)
, ETM_PORT_2BIT = 0x10 | (1 << 21)
, ETM_PORT_WIDTH_MASK = 0x70 | (1 << 21)
, ETM_CTRL_FIFOFULL_STALL = (1 << 7)
,
ETM_CTRL_BRANCH_OUTPUT = (1 << 8)
, ETM_CTRL_DBGRQ = (1 << 9)
, ETM_CTRL_ETM_PROG = (1 << 10)
, ETM_CTRL_ETMEN = (1 << 11)
,
ETM_CTRL_CYCLE_ACCURATE = (1 << 12)
, ETM_PORT_FULL_CLOCK = (0 << 13)
, ETM_PORT_HALF_CLOCK = (1 << 13)
, ETM_PORT_CLOCK_MASK = (1 << 13)
,
ETM_CTRL_CONTEXTID_NONE = (0 << 14)
, ETM_CTRL_CONTEXTID_8 = (1 << 14)
, ETM_CTRL_CONTEXTID_16 = (2 << 14)
, ETM_CTRL_CONTEXTID_32 = (3 << 14)
,
ETM_CTRL_CONTEXTID_MASK = (3 << 14)
, ETM_PORT_NORMAL = (0 << 16)
, ETM_PORT_MUXED = (1 << 16)
, ETM_PORT_DEMUXED = (2 << 16)
,
ETM_PORT_MODE_MASK = (3 << 16)
} |
| |
| enum | { ETMV1_TRACESYNC_CYCLE = 0x1
, ETMV1_TRIGGER_CYCLE = 0x2
} |
| |
| enum | etmv1_branch_reason_t {
BR_NORMAL = 0x0
, BR_ENABLE = 0x1
, BR_RESTART = 0x2
, BR_NODEBUG = 0x3
,
BR_PERIOD = 0x4
, BR_RSVD5 = 0x5
, BR_RSVD6 = 0x6
, BR_RSVD7 = 0x7
} |
| |
| enum | etmv1_pipestat_t {
STAT_IE = 0x0
, STAT_ID = 0x1
, STAT_IN = 0x2
, STAT_WT = 0x3
,
STAT_BE = 0x4
, STAT_BD = 0x5
, STAT_TR = 0x6
, STAT_TD = 0x7
} |
| |
