OpenOCD
arm7_9_common Struct Reference

Structure for items that are common between both ARM7 and ARM9 targets. More...

Collaboration diagram for arm7_9_common:

Data Fields

struct arm arm
 
uint32_t arm_bkpt
 ARM breakpoint instruction. More...
 
void(* branch_resume )(struct target *target)
 
void(* branch_resume_thumb )(struct target *target)
 
int breakpoint_count
 Current number of set breakpoints. More...
 
int(* bulk_write_memory )(struct target *target, target_addr_t address, uint32_t count, const uint8_t *buffer)
 Write target memory in multiples of 4 bytes, optimized for writing large quantities of data. More...
 
void(* change_to_arm )(struct target *target, uint32_t *r0, uint32_t *pc)
 Function for changing from Thumb to ARM mode. More...
 
unsigned int common_magic
 
int dbgreq_adjust_pc
 Amount of PC adjustment caused by a DBGREQ. More...
 
bool dcc_downloads
 
struct working_areadcc_working_area
 
bool debug_entry_from_reset
 Specifies if debug entry was from a reset. More...
 
void(* disable_single_step )(struct target *target)
 
struct reg_cacheeice_cache
 Embedded ICE register cache. More...
 
void(* enable_single_step )(struct target *target, uint32_t next_pc)
 
int(* examine_debug_reason )(struct target *target)
 Function for determining why debug state was entered. More...
 
bool fast_memory_access
 
bool has_monitor_mode
 
bool has_single_step
 
bool has_vector_catch
 Specifies if the target has a reset vector catch. More...
 
struct arm_jtag jtag_info
 JTAG information for target. More...
 
void(* load_byte_reg )(struct target *target, int num)
 
void(* load_hword_reg )(struct target *target, int num)
 
void(* load_word_regs )(struct target *target, uint32_t mask)
 
bool need_bypass_before_restart
 Specifies if there should be a bypass before a JTAG restart. More...
 
int(* post_debug_entry )(struct target *target)
 Callback function called after entering debug mode. More...
 
void(* pre_restore_context )(struct target *target)
 Callback function called before restoring the processor context. More...
 
void(* read_core_regs )(struct target *target, uint32_t mask, uint32_t *core_regs[16])
 Function for reading the core registers. More...
 
void(* read_core_regs_target_buffer )(struct target *target, uint32_t mask, void *buffer, int size)
 
void(* read_xpsr )(struct target *target, uint32_t *xpsr, int spsr)
 Function for reading CPSR or SPSR. More...
 
void(* set_special_dbgrq )(struct target *target)
 Function for setting DBGRQ if the normal way won't work. More...
 
void(* store_byte_reg )(struct target *target, int num)
 
void(* store_hword_reg )(struct target *target, int num)
 
void(* store_word_regs )(struct target *target, uint32_t mask)
 
int sw_breakpoint_count
 keep track of number of software breakpoints we have set More...
 
int sw_breakpoints_added
 Specifies which watchpoint software breakpoints are setup on. More...
 
uint16_t thumb_bkpt
 Thumb breakpoint instruction. More...
 
bool use_dbgrq
 Specifies if DBGRQ should be used to halt the target. More...
 
int wp0_used
 Specifies if and how watchpoint unit 0 is used. More...
 
int wp1_used
 Specifies if and how watchpoint unit 1 is used. More...
 
int wp1_used_default
 Specifies if and how watchpoint unit 1 is used by default. More...
 
int wp_available
 Current number of available watchpoint units. More...
 
int wp_available_max
 Maximum number of available watchpoint units. More...
 
void(* write_core_regs )(struct target *target, uint32_t mask, uint32_t core_regs[16])
 
int(* write_memory )(struct target *target, target_addr_t address, uint32_t size, uint32_t count, const uint8_t *buffer)
 Variant specific memory write function that does not dispatch to bulk_write_memory. More...
 
void(* write_pc )(struct target *target, uint32_t pc)
 Function for writing to the program counter. More...
 
void(* write_xpsr )(struct target *target, uint32_t xpsr, int spsr)
 Function for writing to CPSR or SPSR. More...
 
void(* write_xpsr_im8 )(struct target *target, uint8_t xpsr_im, int rot, int spsr)
 Function for writing an immediate value to CPSR or SPSR. More...
 

Detailed Description

Structure for items that are common between both ARM7 and ARM9 targets.

Definition at line 28 of file arm7_9_common.h.

Field Documentation

◆ arm

◆ arm_bkpt

◆ branch_resume

void(* arm7_9_common::branch_resume) (struct target *target)

◆ branch_resume_thumb

void(* arm7_9_common::branch_resume_thumb) (struct target *target)

◆ breakpoint_count

int arm7_9_common::breakpoint_count

Current number of set breakpoints.

Definition at line 41 of file arm7_9_common.h.

Referenced by arm7_9_add_breakpoint(), and arm7_9_remove_breakpoint().

◆ bulk_write_memory

int(* arm7_9_common::bulk_write_memory) (struct target *target, target_addr_t address, uint32_t count, const uint8_t *buffer)

Write target memory in multiples of 4 bytes, optimized for writing large quantities of data.

Definition at line 121 of file arm7_9_common.h.

Referenced by arm7_9_write_memory_opt(), arm7tdmi_init_arch_info(), arm9tdmi_init_arch_info(), fa526_init_arch_info_2(), and feroceon_common_setup().

◆ change_to_arm

void(* arm7_9_common::change_to_arm) (struct target *target, uint32_t *r0, uint32_t *pc)

Function for changing from Thumb to ARM mode.

Definition at line 65 of file arm7_9_common.h.

Referenced by arm7_9_debug_entry(), arm7_9_soft_reset_halt(), arm7tdmi_init_arch_info(), arm9tdmi_init_arch_info(), fa526_init_arch_info_2(), and feroceon_common_setup().

◆ common_magic

unsigned int arm7_9_common::common_magic

Definition at line 29 of file arm7_9_common.h.

Referenced by is_arm7_9().

◆ dbgreq_adjust_pc

int arm7_9_common::dbgreq_adjust_pc

Amount of PC adjustment caused by a DBGREQ.

Definition at line 47 of file arm7_9_common.h.

Referenced by arm7_9_debug_entry(), arm7tdmi_init_arch_info(), arm9tdmi_init_arch_info(), and fa526_init_arch_info_2().

◆ dcc_downloads

bool arm7_9_common::dcc_downloads

◆ dcc_working_area

struct working_area* arm7_9_common::dcc_working_area

Definition at line 60 of file arm7_9_common.h.

Referenced by arm7_9_bulk_write_memory(), and feroceon_bulk_write_memory().

◆ debug_entry_from_reset

bool arm7_9_common::debug_entry_from_reset

Specifies if debug entry was from a reset.

Definition at line 55 of file arm7_9_common.h.

Referenced by arm7_9_clear_halt().

◆ disable_single_step

void(* arm7_9_common::disable_single_step) (struct target *target)

◆ eice_cache

◆ enable_single_step

void(* arm7_9_common::enable_single_step) (struct target *target, uint32_t next_pc)

◆ examine_debug_reason

int(* arm7_9_common::examine_debug_reason) (struct target *target)

Function for determining why debug state was entered.

Definition at line 62 of file arm7_9_common.h.

Referenced by arm7_9_debug_entry(), arm7tdmi_init_arch_info(), arm926ejs_init_arch_info(), arm9tdmi_init_arch_info(), fa526_init_arch_info_2(), and feroceon_common_setup().

◆ fast_memory_access

bool arm7_9_common::fast_memory_access

◆ has_monitor_mode

bool arm7_9_common::has_monitor_mode

Definition at line 52 of file arm7_9_common.h.

Referenced by embeddedice_build_reg_cache(), and embeddedice_setup().

◆ has_single_step

◆ has_vector_catch

bool arm7_9_common::has_vector_catch

Specifies if the target has a reset vector catch.

Definition at line 53 of file arm7_9_common.h.

Referenced by arm7_9_assert_reset(), arm7_9_clear_halt(), arm7_9_setup_semihosting(), arm9tdmi_init_arch_info(), embeddedice_build_reg_cache(), and fa526_init_arch_info_2().

◆ jtag_info

struct arm_jtag arm7_9_common::jtag_info

JTAG information for target.

Definition at line 29 of file arm7_9_common.h.

Referenced by arm720t_scan_cp15(), arm7_9_deinit(), arm7_9_examine(), arm7_9_execute_fast_sys_speed(), arm7_9_execute_sys_speed(), arm7_9_handle_target_request(), arm7_9_restart_core(), arm7_9_target_request_data(), arm7tdmi_branch_resume(), arm7tdmi_branch_resume_thumb(), arm7tdmi_change_to_arm(), arm7tdmi_examine_debug_reason(), arm7tdmi_init_arch_info(), arm7tdmi_load_byte_reg(), arm7tdmi_load_hword_reg(), arm7tdmi_load_word_regs(), arm7tdmi_read_core_regs(), arm7tdmi_read_core_regs_target_buffer(), arm7tdmi_read_xpsr(), arm7tdmi_store_byte_reg(), arm7tdmi_store_hword_reg(), arm7tdmi_store_word_regs(), arm7tdmi_write_core_regs(), arm7tdmi_write_pc(), arm7tdmi_write_xpsr(), arm7tdmi_write_xpsr_im8(), arm920t_execute_cp15(), arm920t_read_cp15_physical(), arm920t_write_cp15_physical(), arm926ejs_cp15_read(), arm926ejs_cp15_write(), arm946e_read_cp15(), arm946e_write_cp15(), arm966e_read_cp15(), arm966e_write_cp15(), arm9tdmi_branch_resume(), arm9tdmi_branch_resume_thumb(), arm9tdmi_change_to_arm(), arm9tdmi_examine_debug_reason(), arm9tdmi_init_arch_info(), arm9tdmi_load_byte_reg(), arm9tdmi_load_hword_reg(), arm9tdmi_load_word_regs(), arm9tdmi_read_core_regs(), arm9tdmi_read_core_regs_target_buffer(), arm9tdmi_read_xpsr(), arm9tdmi_store_byte_reg(), arm9tdmi_store_hword_reg(), arm9tdmi_store_word_regs(), arm9tdmi_write_core_regs(), arm9tdmi_write_pc(), arm9tdmi_write_xpsr(), arm9tdmi_write_xpsr_im8(), embeddedice_build_reg_cache(), fa526_init_arch_info_2(), fa526_read_core_regs(), fa526_read_core_regs_target_buffer(), fa526_read_xpsr(), fa526_write_core_regs(), fa526_write_pc(), fa526_write_xpsr(), fa526_write_xpsr_im8(), feroceon_branch_resume(), feroceon_branch_resume_thumb(), feroceon_change_to_arm(), feroceon_read_core_regs(), feroceon_read_core_regs_target_buffer(), feroceon_read_cp15(), feroceon_read_xpsr(), feroceon_write_core_regs(), feroceon_write_cp15(), feroceon_write_xpsr(), feroceon_write_xpsr_im8(), and FLASH_BANK_COMMAND_HANDLER().

◆ load_byte_reg

void(* arm7_9_common::load_byte_reg) (struct target *target, int num)

◆ load_hword_reg

void(* arm7_9_common::load_hword_reg) (struct target *target, int num)

◆ load_word_regs

void(* arm7_9_common::load_word_regs) (struct target *target, uint32_t mask)

◆ need_bypass_before_restart

bool arm7_9_common::need_bypass_before_restart

Specifies if there should be a bypass before a JTAG restart.

Definition at line 49 of file arm7_9_common.h.

Referenced by arm7_9_execute_fast_sys_speed(), arm7_9_execute_sys_speed(), arm7_9_restart_core(), feroceon_branch_resume(), and feroceon_branch_resume_thumb().

◆ post_debug_entry

int(* arm7_9_common::post_debug_entry) (struct target *target)

◆ pre_restore_context

void(* arm7_9_common::pre_restore_context) (struct target *target)

◆ read_core_regs

void(* arm7_9_common::read_core_regs) (struct target *target, uint32_t mask, uint32_t *core_regs[16])

◆ read_core_regs_target_buffer

void(* arm7_9_common::read_core_regs_target_buffer) (struct target *target, uint32_t mask, void *buffer, int size)

◆ read_xpsr

void(* arm7_9_common::read_xpsr) (struct target *target, uint32_t *xpsr, int spsr)

◆ set_special_dbgrq

void(* arm7_9_common::set_special_dbgrq) (struct target *target)

Function for setting DBGRQ if the normal way won't work.

Definition at line 101 of file arm7_9_common.h.

Referenced by arm7_9_halt(), and feroceon_common_setup().

◆ store_byte_reg

void(* arm7_9_common::store_byte_reg) (struct target *target, int num)

◆ store_hword_reg

void(* arm7_9_common::store_hword_reg) (struct target *target, int num)

◆ store_word_regs

void(* arm7_9_common::store_word_regs) (struct target *target, uint32_t mask)

◆ sw_breakpoint_count

int arm7_9_common::sw_breakpoint_count

keep track of number of software breakpoints we have set

Definition at line 40 of file arm7_9_common.h.

Referenced by arm7_9_clear_watchpoints(), arm7_9_set_breakpoint(), and arm7_9_unset_breakpoint().

◆ sw_breakpoints_added

int arm7_9_common::sw_breakpoints_added

Specifies which watchpoint software breakpoints are setup on.

Definition at line 39 of file arm7_9_common.h.

Referenced by arm7_9_clear_watchpoints(), arm7_9_set_software_breakpoints(), and arm7_9_unset_breakpoint().

◆ thumb_bkpt

◆ use_dbgrq

bool arm7_9_common::use_dbgrq

◆ wp0_used

int arm7_9_common::wp0_used

◆ wp1_used

int arm7_9_common::wp1_used

◆ wp1_used_default

int arm7_9_common::wp1_used_default

Specifies if and how watchpoint unit 1 is used by default.

Definition at line 46 of file arm7_9_common.h.

Referenced by arm7_9_clear_watchpoints(), and feroceon_common_setup().

◆ wp_available

◆ wp_available_max

int arm7_9_common::wp_available_max

Maximum number of available watchpoint units.

Definition at line 43 of file arm7_9_common.h.

Referenced by arm7_9_clear_watchpoints(), embeddedice_build_reg_cache(), and feroceon_common_setup().

◆ write_core_regs

void(* arm7_9_common::write_core_regs) (struct target *target, uint32_t mask, uint32_t core_regs[16])

◆ write_memory

int(* arm7_9_common::write_memory) (struct target *target, target_addr_t address, uint32_t size, uint32_t count, const uint8_t *buffer)

Variant specific memory write function that does not dispatch to bulk_write_memory.

Used as a fallback when bulk writes are unavailable, or for writing data needed to do the bulk writes.

Definition at line 115 of file arm7_9_common.h.

Referenced by arm7_9_write_memory_no_opt(), arm7_9_write_memory_opt(), arm7tdmi_init_arch_info(), arm920t_init_arch_info(), arm926ejs_init_arch_info(), arm9tdmi_init_arch_info(), dragonite_target_create(), fa526_init_arch_info_2(), and feroceon_target_create().

◆ write_pc

void(* arm7_9_common::write_pc) (struct target *target, uint32_t pc)

Function for writing to the program counter.

Definition at line 92 of file arm7_9_common.h.

Referenced by arm7_9_restore_context(), arm7tdmi_init_arch_info(), arm9tdmi_init_arch_info(), and fa526_init_arch_info_2().

◆ write_xpsr

void(* arm7_9_common::write_xpsr) (struct target *target, uint32_t xpsr, int spsr)

◆ write_xpsr_im8

void(* arm7_9_common::write_xpsr_im8) (struct target *target, uint8_t xpsr_im, int rot, int spsr)

The documentation for this struct was generated from the following file: