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mips32_pracc.h File Reference
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Data Structures

struct  pa_list
 
struct  pracc_queue_info
 

Macros

#define LOWER16(uint32_t)   (uint32_t & 0xFFFF)
 
#define MIPS32_FASTDATA_HANDLER_SIZE   0x80
 
#define MIPS32_PRACC_BASE_ADDR   0xFF200000
 
#define MIPS32_PRACC_FASTDATA_AREA   0xFF200000
 
#define MIPS32_PRACC_FASTDATA_SIZE   16
 
#define MIPS32_PRACC_PARAM_OUT   0xFF202000
 
#define MIPS32_PRACC_TEXT   0xFF200200
 
#define NEG16(v)   (((~(v)) + 1) & 0xFFFF)
 
#define PRACC_BLOCK   128 /* 1 Kbyte */
 
#define PRACC_MAX_CODE   (MIPS32_PRACC_PARAM_OUT - MIPS32_PRACC_TEXT)
 
#define PRACC_MAX_INSTRUCTIONS   (PRACC_MAX_CODE / 4)
 
#define PRACC_OUT_OFFSET   (MIPS32_PRACC_PARAM_OUT - MIPS32_PRACC_BASE_ADDR)
 
#define PRACC_UPPER_BASE_ADDR   (MIPS32_PRACC_BASE_ADDR >> 16)
 
#define SWAP16(v)   ((LOWER16(v) << 16) | (UPPER16(v)))
 
#define UPPER16(uint32_t)   (uint32_t >> 16)
 

Functions

int mips32_cp0_read (struct mips_ejtag *ejtag_info, uint32_t *val, uint32_t cp0_reg, uint32_t cp0_sel)
 mips32_cp0_read More...
 
int mips32_cp0_write (struct mips_ejtag *ejtag_info, uint32_t val, uint32_t cp0_reg, uint32_t cp0_sel)
 mips32_cp0_write More...
 
int mips32_pracc_exec (struct mips_ejtag *ejtag_info, struct pracc_queue_info *ctx, uint32_t *param_out, bool check_last)
 
int mips32_pracc_fastdata_xfer (struct mips_ejtag *ejtag_info, struct working_area *source, int write_t, uint32_t addr, int count, uint32_t *buf)
 
int mips32_pracc_queue_exec (struct mips_ejtag *ejtag_info, struct pracc_queue_info *ctx, uint32_t *buf, bool check_last)
 
int mips32_pracc_read_mem (struct mips_ejtag *ejtag_info, uint32_t addr, int size, int count, void *buf)
 
int mips32_pracc_read_regs (struct mips_ejtag *ejtag_info, uint32_t *regs)
 
int mips32_pracc_write_mem (struct mips_ejtag *ejtag_info, uint32_t addr, int size, int count, const void *buf)
 
int mips32_pracc_write_regs (struct mips_ejtag *ejtag_info, uint32_t *regs)
 
void pracc_add (struct pracc_queue_info *ctx, uint32_t addr, uint32_t instr)
 
void pracc_add_li32 (struct pracc_queue_info *ctx, uint32_t reg_num, uint32_t data, bool optimize)
 
void pracc_queue_free (struct pracc_queue_info *ctx)
 
void pracc_queue_init (struct pracc_queue_info *ctx)
 
static void pracc_swap16_array (struct mips_ejtag *ejtag_info, uint32_t *buf, int count)
 

Macro Definition Documentation

#define MIPS32_FASTDATA_HANDLER_SIZE   0x80

Definition at line 41 of file mips32_pracc.h.

Referenced by mips32_pracc_fastdata_xfer(), and mips_m4k_bulk_write_memory().

#define MIPS32_PRACC_BASE_ADDR   0xFF200000

Definition at line 32 of file mips32_pracc.h.

#define MIPS32_PRACC_FASTDATA_AREA   0xFF200000

Definition at line 30 of file mips32_pracc.h.

Referenced by mips32_pracc_fastdata_xfer().

#define MIPS32_PRACC_FASTDATA_SIZE   16

Definition at line 31 of file mips32_pracc.h.

#define MIPS32_PRACC_TEXT   0xFF200200
#define PRACC_BLOCK   128 /* 1 Kbyte */

Definition at line 48 of file mips32_pracc.h.

Referenced by pracc_add().

#define PRACC_MAX_CODE   (MIPS32_PRACC_PARAM_OUT - MIPS32_PRACC_TEXT)

Definition at line 37 of file mips32_pracc.h.

#define PRACC_MAX_INSTRUCTIONS   (PRACC_MAX_CODE / 4)

Definition at line 38 of file mips32_pracc.h.

Referenced by ath79_spi_bitbang_chunk().

#define SWAP16 (   v)    ((LOWER16(v) << 16) | (UPPER16(v)))

Function Documentation

int mips32_cp0_read ( struct mips_ejtag ejtag_info,
uint32_t *  val,
uint32_t  cp0_reg,
uint32_t  cp0_sel 
)

mips32_cp0_read

Simulates mfc0 ASM instruction (Move From C0), i.e. implements copro C0 Register read.

Parameters
[in]ejtag_info
[in]valStorage to hold read value
[in]cp0_regNumber of copro C0 register we want to read
[in]cp0_selSelect for the given C0 register
Returns
ERROR_OK on Sucess, ERROR_FAIL otherwise

Definition at line 558 of file mips32_pracc.c.

References pracc_queue_info::code_count, pracc_queue_info::ejtag_info, pracc_queue_info::isa, LOWER16, MIPS32_B, MIPS32_LUI, MIPS32_MFC0, MIPS32_ORI, MIPS32_PRACC_PARAM_OUT, mips32_pracc_queue_exec(), MIPS32_SW, NEG16, pracc_add(), PRACC_OUT_OFFSET, pracc_queue_free(), pracc_queue_init(), PRACC_UPPER_BASE_ADDR, mips_ejtag::reg8, pracc_queue_info::retval, and UPPER16.

Referenced by COMMAND_HANDLER(), mips32_pracc_synchronize_cache(), mips32_pracc_write_mem(), and mips32_read_config_regs().

int mips32_cp0_write ( struct mips_ejtag ejtag_info,
uint32_t  val,
uint32_t  cp0_reg,
uint32_t  cp0_sel 
)

mips32_cp0_write

Simulates mtc0 ASM instruction (Move To C0), i.e. implements copro C0 Register read.

Parameters
[in]ejtag_info
[in]valValue to be written
[in]cp0_regNumber of copro C0 register we want to write to
[in]cp0_selSelect for the given C0 register
Returns
ERROR_OK on Sucess, ERROR_FAIL otherwise

Definition at line 577 of file mips32_pracc.c.

References pracc_queue_info::code_count, pracc_queue_info::ejtag_info, pracc_queue_info::isa, MIPS32_B, MIPS32_MFC0, MIPS32_MTC0, mips32_pracc_queue_exec(), NEG16, NULL, pracc_add(), pracc_add_li32(), pracc_queue_free(), pracc_queue_init(), and pracc_queue_info::retval.

Referenced by COMMAND_HANDLER().

int mips32_pracc_write_mem ( struct mips_ejtag ejtag_info,
uint32_t  addr,
int  size,
int  count,
const void *  buf 
)

If we are in the cacheable region and cache is activated, we must clean D$ (if Cache Coherency Attribute is set to 3) + invalidate I$ after we did the write, so that changes do not continue to live only in D$ (if CCA = 3), but to be replicated in I$ also (maybe we wrote the istructions)

Check cachablitiy bits coherency algorithm is the region cacheable or uncached. If cacheable we have to synchronize the cache

Definition at line 782 of file mips32_pracc.c.

References addr, ERROR_FAIL, ERROR_OK, KSEG0, KSEG1, KSEG2, KSEG3, KSEGX, KUSEG, LOG_DEBUG, MIPS32_CONFIG0_AR_MASK, MIPS32_CONFIG0_AR_SHIFT, MIPS32_CONFIG0_K0_MASK, MIPS32_CONFIG0_K0_SHIFT, MIPS32_CONFIG0_K23_MASK, MIPS32_CONFIG0_K23_SHIFT, MIPS32_CONFIG0_KU_MASK, MIPS32_CONFIG0_KU_SHIFT, mips32_cp0_read(), mips32_pracc_synchronize_cache(), mips32_pracc_write_mem_generic(), and pracc_queue_info::retval.

Referenced by mips32_pracc_fastdata_xfer(), and mips_m4k_write_memory().

void pracc_add_li32 ( struct pracc_queue_info ctx,
uint32_t  reg_num,
uint32_t  data,
bool  optimize 
)
static void pracc_swap16_array ( struct mips_ejtag ejtag_info,
uint32_t *  buf,
int  count 
)
inlinestatic