OpenOCD
io.h
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1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 
3 /***************************************************************************
4  * Copyright (C) 2011 by Martin Schmoelzer *
5  * <martin.schmoelzer@student.tuwien.ac.at> *
6  ***************************************************************************/
7 
8 #ifndef __IO_H
9 #define __IO_H
10 
11 #include "reg_ezusb.h"
12 
13 /***************************************************************************
14  * JTAG Signals: *
15  ***************************************************************************
16  * TMS ....... Test Mode Select *
17  * TCK ....... Test Clock *
18  * TDI ....... Test Data Input (from device point of view, not JTAG *
19  * adapter point of view!) *
20  * TDO ....... Test Data Output (from device point of view, not JTAG *
21  * adapter point of view!) *
22  * TRST ...... Test Reset: Used to reset the TAP Finite State Machine *
23  * into the Test Logic Reset state *
24  * RTCK ...... Return Test Clock *
25  * OCDSE ..... Enable/Disable OCDS interface (Infineon specific) - shared *
26  * with /JEN *
27  * TRAP ...... Trap Condition (Infineon specific) - shared with TSTAT *
28  * BRKIN ..... Hardware Break-In (Infineon specific) *
29  * BRKOUT .... Hardware Break-Out (Infineon specific) *
30  * /JEN ...... JTAG-Enable (STMicroelectronics specific) - shared *
31  * with OCDSE *
32  * TSTAT ..... JTAG ISP Status (STMicroelectronics specific) - shared *
33  * with TRAP *
34  * RESET ..... Chip Reset (STMicroelectronics specific) *
35  * /TERR ..... JTAG ISP Error (STMicroelectronics specific) - shared *
36  * with BRKOUT *
37  ***************************************************************************/
38 
39 /* PORT A */
40 #define PIN_U_OE OUTA0
41 /* PA1 Not Connected */
42 #define PIN_OE OUTA2
43 /* PA3 Not Connected */
44 #define PIN_RUN_LED OUTA4
45 #define PIN_TDO PINA5
46 #define PIN_BRKOUT PINA6
47 #define PIN_COM_LED OUTA7
48 
49 /* PORT B */
50 #define PIN_TDI OUTB0
51 #define PIN_TMS OUTB1
52 #define PIN_TCK OUTB2
53 #define PIN_TRST OUTB3
54 #define PIN_BRKIN OUTB4
55 #define PIN_RESET OUTB5
56 #define PIN_OCDSE OUTB6
57 #define PIN_TRAP PINB7
58 
59 /* JTAG Signals with direction 'OUT' on port B */
60 #define MASK_PORTB_DIRECTION_OUT (PIN_TDI | PIN_TMS | PIN_TCK | PIN_TRST | PIN_BRKIN | PIN_RESET | PIN_OCDSE)
61 
62 /* PORT C */
63 #define PIN_RXD0 PINC0
64 #define PIN_TXD0 OUTC1
65 #define PIN_RESET_2 PINC2
66 /* PC3 Not Connected */
67 /* PC4 Not Connected */
68 #define PIN_RTCK PINC5
69 #define PIN_WR OUTC6
70 /* PC7 Not Connected */
71 
72 /* LED Macros */
73 #define SET_RUN_LED() (OUTA &= ~PIN_RUN_LED)
74 #define CLEAR_RUN_LED() (OUTA |= PIN_RUN_LED)
75 
76 #define SET_COM_LED() (OUTA &= ~PIN_COM_LED)
77 #define CLEAR_COM_LED() (OUTA |= PIN_COM_LED)
78 
79 /* JTAG Pin Macros */
80 #define GET_TMS() (PINSB & PIN_TMS)
81 #define GET_TCK() (PINSB & PIN_TCK)
82 
83 #define GET_TDO() (PINSA & PIN_TDO)
84 #define GET_BRKOUT() (PINSA & PIN_BRKOUT)
85 #define GET_TRAP() (PINSB & PIN_TRAP)
86 #define GET_RTCK() (PINSC & PIN_RTCK)
87 
88 #define SET_TMS_HIGH() (OUTB |= PIN_TMS)
89 #define SET_TMS_LOW() (OUTB &= ~PIN_TMS)
90 
91 #define SET_TCK_HIGH() (OUTB |= PIN_TCK)
92 #define SET_TCK_LOW() (OUTB &= ~PIN_TCK)
93 
94 #define SET_TDI_HIGH() (OUTB |= PIN_TDI)
95 #define SET_TDI_LOW() (OUTB &= ~PIN_TDI)
96 
97 /* TRST and RESET are low-active and inverted by hardware. SET_HIGH de-asserts
98  * the signal (enabling reset), SET_LOW asserts the signal (disabling reset) */
99 #define SET_TRST_HIGH() (OUTB |= PIN_TRST)
100 #define SET_TRST_LOW() (OUTB &= ~PIN_TRST)
101 
102 #define SET_RESET_HIGH() (OUTB |= PIN_RESET)
103 #define SET_RESET_LOW() (OUTB &= ~PIN_RESET)
104 
105 #define SET_OCDSE_HIGH() (OUTB |= PIN_OCDSE)
106 #define SET_OCDSE_LOW() (OUTB &= ~PIN_OCDSE)
107 
108 #define SET_BRKIN_HIGH() (OUTB |= PIN_BRKIN)
109 #define SET_BRKIN_LOW() (OUTB &= ~PIN_BRKIN)
110 
111 #endif
reg_ezusb.h
All information in this file was taken from the EZ-USB Technical Reference Manual,...